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Data Protection Policy

At LogikHaus, we take your privacy seriously. We are fully committed to protecting your personal information in compliance with Singapore's Personal Data Protection Act (PDPA) 2012.

How we handle your data:

For more information on your rights under Singapore Law, please visit:

→ Singapore Statutes Online (PDPA 2012) → DLA Piper Global Data Protection Guide (Singapore)

Frequently Asked Questions

Is the VPU IP Core available in VHDL?
Yes. We license the VPU IP Core as a VHDL netlist (Vivado) or as VHDL source code, RFQ on request.
Who designed the VPU IP Core?
The VPU IP Core was architected and verified in-house by the LogikHaus engineering team, using an OSVVM/UVM-based VHDL design and verification methodology.
What interfaces does the VPU IP Core support?
The IP core version uses AXI4-Stream for video data and AXI4-Lite for configuration. The packaged ASIC version supports HDMI and MIPI data interfaces with SPI configuration.
Video and AI Imaging Solutions
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Video and AI Imaging Solutions

Brand: LogikHaus
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Product Overview

Video processing IP core (VPU) for FPGA and ASIC, available as a VHDL netlist or VHDL source code for real-time video and AI imaging applications.

  • Real-time AI video processing on FPGA
  • Digital imaging ASIC and FPGA IP cores, licensed as VHDL netlist or RTL
  • Analogue imaging ASIC IP licensing
  • Stable production schedules for custom imaging ASICs
  • PCB imaging solutions built with COTS components (boards using US / European chips may be affected by supply disruptions)

Interfaces:

  • IP core version: AXI4-Stream data interface, AXI4-Lite configuration interface
  • Packaged ASIC version: native HDMI and MIPI data interfaces, SPI configuration interface

Every core is designed and verified in-house using an OSVVM/UVM-based VHDL design methodology.